November 18, 2020. Our latest work on algorithmic/systematic analog design is now being published by IEEE TCAS-I. This article sheds light on energy-efficient analog circuit design from a new perspective. The main goal of this article is to provide a simple/analytical/systematic perspective on speed-power trade-offs in design of Field-Effect Transistors (FETs). There are several approaches to implement energy-efficient analog circuits (e.g. gm/ID and inversion-coefficient based design). The proposed methodology in our latest paper offers a simpler and more insightful design approach.
