Apr 20, 2026. Congratulations to Behdad Jamadi, Farzad Ordubadi and Asif Wahid for their paper being accepted in IEEE SMACD’2026, Dresden, Germany. The paper is entitled: “Automation Design Flow for Analog Cricuits”. This article explores novel methodologies to automatize the flow of designing analog circuits.
Relevant work: Link.
Feb 20, 2026. Congratulations to Farzad Ordubadi and Michael Keyser for their paper being accepted in IEEE ISCAS’2026, Shanghai, China. The paper is entitled: “A Discrete-Time Analog Compute Macro for Edge ML with 200 TOPS/W in CMOS 28nm”. This article explores new ways to implement analog Multiply and Accumulate (MAC) circuits for implementing neural networks.
Relevant work: Keyser, Michael, Farzad Ordubadi, and Armin Tajalli. “Effect of Parameter Drift on the Accuracy of Analog CNN Accelerators.” 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2024.
July 20, 2025. Congratulations to Farzad Ordubadi, for receiving the IEEE MWSCAS 2025 Student Travel grant ! Farzad, in collaboration with Behdad Jamadi, will present their work on algorithmic design of LC Voltage Controlled Oscillator circuits, using C/ID algorithm.
Relevant material:
May 27, 2025. LCAS team will publish a paper in ISLPED 2025 in collaboration with Professor Gain Kim’s team from Daegu Gyeongbuk Institute of Science and Technology (DGIST), South Korea. Entitled “A Spectral-Efficient Low-Power NRZ/PAM-4 Dual-Mode Wireline Transmitter for Multidrop Interfaces”, this article explores new approaches to implement energy-efficient serial data communication systems [Link].
May 27, 2025. Congratulations to Behdad Jamadi, for having his paper accepted for presentation at MWSCAS’2025, Lansing, Michigan, USA. Entitled “LC VCO Design Optimization Flow Using C/ID“, this article presents new algorithms to design complex analog circuits such as LC VCOs. This algorithm is based on C/ID [link].
May 25, 2025. Professor Tajalli has been invited to give a tutorial lecture on “Algorithmic Analog and RF Circuit Design: A Steppingstone Toward Analog Automation” in ISCAS’2025, London, UK [link]. Professor Christian Enz (EPFL, Switzerland) and Thierry Taris (IMS Bordeaux, France) will also present the latest developments in the filed of algorithmic analog design in this tutorial session.
April 7, 2025. Congratulations to Dinali Assylbek for receiving 2025 Undergraduate Research Opportunities Program (UROP) Award. Dinali will join an ongoing project in LCAS team, where a hardware-in-the-loop neural network modeling and simulation tool will be developed. Looking forward to working with you Dinali !
April 20, 2025. Congratulations to Kenneth Gordon for presenting his senior project! During his senior project, Kenneth has developed a platform to model analog neural networks using hardware-in-the-loop architecture. Kenneth and his colleagues (Michael Keyser, Farzad Ordubadi, Varun Krishnamurthy, and Dinali Asylbeck) has developed an automatize flow to design and program an FPGA, with the goal to implement a a fast hardware-in-the-loop simulation setup.
Dec 29, 2024. Congratulations to Alec Adair, for receiving the IEEE SSCS Open-Source Eco-System “Code-a-Chip” travel grant award at ISSCC 2025 ! Alec’s work, entitled Automated Current-Mirror based OTA Design and Optimization – from Specifications to Layout, will be presented at ISSCC 2025, in San Francisco, USA. The submissions for this event have been made in the form of Jupyter notebooks with .ipynb files at predefined git repositories. Alec is using C/ID algorithms to implement a low-complexity design algorithm for implementing Operational Transconductance Amplifiers (OTAs). Alec’s long-term plan is to expand these algorithms and generalize them such that they can be applied to different types of circuits.
Relevant material:
Oct 23, 2024. IEEE SSCS Utah Chapter organized a seminar, where Prof. Hyun-Sik Kim, from KAIST, South Korea, was invited to give a lecture on his latest research work. A distinguished lecturer (DL), Prof. Hyun-Sik Kim presented his research team’s work on design of advanced high-performance low-drop-out regulators. We appreciate IEEE SSCS Utah Chapter and Prof. Kim for the excellent event organized at the ECE Department, University of Utah. See the IEEE SSCS summary Here.